Design a common-collector (emitter follower) buffer amplifier. This topology provides near-unity gain with high input impedance and low output impedance - ideal for driving low-impedance loads without loading the source.
| Vcc: | V |
| Input (peak): | V |
| Source impedance: | Ω |
| Low frequency (-3dB): | Hz |
| Load resistance: | Ω |
| Emitter current (Ie): | mA |
| Transistor: | |
| β (hFE): | |
| fT: | MHz |
Hover over labels for explanations.
Component values rounded to standard E24 series.
| R1 (upper bias): | |
| R2 (lower bias): | |
| Re (emitter): | |
| Cin (input): | |
| Cout (output): |
The emitter follower excels at impedance transformation - high Zin, low Zout. Gain is slightly less than 1 due to the voltage divider formed by re' and Re.
| Input impedance (Zin): | |
| Output impedance (Zout): | |
| Voltage gain: | |
| Input attenuation: | |
| Effective gain: | |
| Expected output: |
The emitter follower has no phase inversion - output follows input (hence the name). Clipping occurs if output exceeds the available swing.
The load line shows the operating path. For an emitter follower, the DC load is just Re (collector connects directly to Vcc).
Low frequencies are limited by coupling capacitors (Cin, Cout). High frequencies are limited by the transistor's β rolloff at fβ = fT/β. The emitter follower has minimal Miller effect since voltage gain is near unity.
Higher current = lower output impedance, but more power dissipation:
IE chosen based on load requirements
Rule of thumb: IE > 10 × (Vout / Rload)
Set Ve at roughly half of Vcc for maximum swing:
VE ≈ VCC / 2
RE = VE / IE
re' = 26mV / IE = 0.026 / IE
VB = VE + 0.7V
IB = IE / β
Idivider = 10 × IB
Rtotal = VCC / Idivider
R2 = (VB / VCC) × Rtotal
R1 = Rtotal - R2
Gain is slightly less than 1:
Av = (RE ∥ Rload) / (re' + RE ∥ Rload)
Av ≈ 0.95 to 0.99 typically
Zin(base) = β × (re' + RE ∥ Rload)
Zin = R1 ∥ R2 ∥ Zin(base)
Zout = (re' + Rsource/β) ∥ RE
For low Rsource: Zout ≈ re' ∥ RE ≈ re'
Cin = 1 / (2π × flow × Zin)
Cout = 1 / (2π × flow × Rload)